NAND Flash Technology

The development of NAND flash technology has been steadily moving forward based on a multitude of inputs from the industry.

Meltron delivers flash-based products for next generation storage application. NAND flash devices are used to store data and code. Low-density NAND flash is ideal for applications like booth drive, digital televisions (DTVs), and instruments while high-density NAND flash is most commonly used in data-heavy applications like AI , Machine Learning, Servers, and Transportation.

The main differentiator of NAND flash is the number of bits per cell & Endurance

Something that has really changed over the past few years is the use of an increasing numbers of voltage levels in multi-level cell flash, from SLC, to MLC, to TLC, and then QLC, with the promise of PLC (5 bits per cell) in the foreseeable future.

The new 3D NAND enables high density products at lower cost, but requires significantly higher error correction and sophisticated flash firmware management. Only few 3D NAND products are able to fully support an industrial temperature grade of -40°C to +85°C

The endurance of flash-based products is primarily defined by the maximum number of program/erase cycles of the flash components. SLC components normally allow 100,000 PE cycles per block, while MLC and 3D TLC are typically specified with 3,000 PE cycles. Quad-level cells (QLC) max out at about 1,200. Should penta-level cells (PLC) with 5 bits ever be commercialized, they will likely have less than 600 cycles, severely limiting their usefulness.

SLC’s main advantages over MLC, TLC and QLC include ability to read and write data at low latency, support high-write/erase cycle endurance, and offer industrial temp availability. QLC is huge in enterprise, QLC NAND is suited particularly to read-intensive applications and is used for applications supporting AI, machine learning and deep learning, where data is typically written once. It is not suited to write-intensive workloads, supporting around 100 write cycles. There is a continuous effort to reduce the cost/GB of NAND devices, so device life cycles tend to be shorter with more frequent process lithography shrinks.

As things stand today, both TLC and QLC can support pSLC mode. This option is a significantly less expensive alternative to traditional SLC. It also provides enhanced performance and endurance over the normal 3D NAND cell. Though the cycling capability of SLC is helpful, it is not sufficient to build a high-endurance product.

What is pSLC NAND Technology?

Pseudo SLC is not NAND flash memory: it’s a capability within NAND flash memory and configured in the Enhanced User Data Area2.

All modern NAND cells can operate in pSLC mode. Though the pSLC capability is rarely used in typical client or enterprise applications, it is of great use to industrial, medical, automotive, aviation and space write-intensive use cases.

Cells used in pSLC mode have the same programming speed and endurance as dedicated SLC, but benefit from modern smaller cell sizes and 3D configurations, which reduce overall cost. One question that comes up frequently is whether pseudo MLC (pMLC) mode could work as a middle ground for those who need a bit more capacity. Unfortunately, the physics behind NAND cells don’t currently support that option.

Controller Technology

NAND requires a controller, either internal or external, and specific firmware for error code correction (ECC), bad block management, and wear leveling. The Firmware features optimization for retention, endurance, protection against data loss at sudden power fail, and strong error correction. The controller sits between the NAND and the interface for the host. It acts as a processor to manage the operation of the NAND component and is a standard interface for easy integration into host systems. The controller is responsible for some of the most important functions including read and write caching, ECC, wear leveling, and read disturb management. It also performs bad block mapping.